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| Supertex inc. High Voltage Dual EL Lamp Driver Features Independent input control for lamp selection Split supply capability Patented output timing One miniature inductor to power both lamps Low shutdown current Wide input voltage range 2.0V to 5.8V Output voltage regulation No SCR output Available in small packages (10-lead MSOP and 10-lead DFN/MLP) HV841 Initial Release General Description The Supertex HV841 is a high voltage driver designed for driving two EL lamps with a combined area of 3.5 square inches. The input supply voltage range is from 2.0V to 5.8V. The device is designed to reduce the amount of audible noise emitted by the lamp. This device uses a single inductor and minimum number of passive components to drive two EL lamps. The nominal regulated output voltage of 100V is applied to the EL lamps. The chip can be enabled/ disabled by connecting C1 and C2 (pins 1 and 4) to VEN/ Ground. The HV841 has an internal oscillator, a switching MOSFET, and two high voltage EL lamp drivers. An external resistor connected between the RSW-OSC and the voltage supply pin VDD sets the frequency for the switching MOSFET. The EL lamp driver frequency is set by dividing the MOSFET switching frequency by 128. An external inductor is connected between the LX and the VDD pins. Depending on the EL lamp size, a 1.0 to 10.0nF, 200V capacitor is connected between CS and Ground. The two EL lamps are connected between EL1 to Com and EL2 to Com. The switching MOSFET charges the external inductor and discharges it into the capacitor at CS. The voltage at CS increases. Once the voltage at CS reaches a nominal value of 100V, the switching MOSFET is turned off to conserve power. The outputs EL1 to Com and EL2 to Com are configured as H bridges and switch in opposite states to achieve 200V across the EL lamp. Applications Mobile cellular phones, dual display Keypad and LCD backlighting Portable instrumentation Dual segment lamps Hand held wireless communication devices Typical Application Circuit VEN = ON 0 = OFF VEN = ON 0 = OFF 1 EL Lamp 11 C1 VDD EL1 EL2 10 9 8 7 6 + VDD - RSW-OSC CDD 2 3 4 5 RSW-OSC Com C2 GND CS LX EL Lamp 21 D VIN + CIN - HV841MG-G/ HV841K6-G ~ LX CS 1 The bigger sized lamp should be tied to EL1 and the smaller sized lamp to EL2 terminals (pins 10 and 9 respectively) NR033106 Supertex inc. * 1235 Bordeaux Drive, Sunnyvale, CA 94089 * Tel: (408) 222-8888 * FAX: (408) 222-4895 * www.supertex.com 1 HV841 Ordering Information Package Options DEVICE DFN/MLP-101 HV841 HV841K6-G MSOP-102 HV841MG-G Absolute Maximum Ratings* Supply Voltage, VDD Supply Voltage, VCS Operating Ambient Temperature Range Storage Temperature Range -0.5 to +7.5V -0.5 to +120V -40C to +85C -65 to +150C 1 Product supplied on 3000 piece carrier tape reels only 2 Product supplied on 2500 piece carrier tape reels only -G indicates package is RoHS compliant (`Green') *Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground, Gnd Recommended Operating Conditions Symbol VDD TA Parameter Supply Voltage Operating Temperature Min 2.0 -40 Typ Max 5.8 85 Units V o Conditions C Function Table C1 0 0 1 1 C2 0 1 0 1 EL1 Hi Z Hi Z ON ON EL2 Hi Z ON Hi Z ON Com Hi Z ON ON ON IC OFF ON ON ON Pin Configuration Pin1 C1 1 10 EL1 9 EL2 8 Com 7 CS 6 LX VDD 2 RSW-OSC 3 C1 VDD RSW-OSC C2 GND HV841K6-G EL1 EL2 COM CS LX C2 4 GND 5 HV841MG-G (Pads are on the bottom of the package.) Top View: MSOP-10 Top View: DFN/MLP-10 Note: Packages are not drawn to scale. 2 NR033106 Electrical Characteristics DC Characteristics (Over operating conditions unless otherwise specified, T = 25C) A HV841 Min 2.0 90 180 - Symbol Parameter RDS(ON) VDD VCS VDIFF IDDQ IDD fEL fSW D IIL IIH VEN-L VEN-H On-resistance of switching transistor Input Voltage Range Output regulation voltage Differential output peak to peak voltage (EL1 to Com, EL2 to Com) Quiescent VDD supply current Input current into the VDD pin VDIFF output drive frequency Switching transistor frequency Switching Transistor Duty cycle Input logic low current going into the control pin Input logic low current going into the control pin Logic input low voltage Logic input high voltage Typ 100 200 - Max 6.0 5.8 110 220 150 500 190 Units V V V nA nA A Hz kHz % A A V V Conditions I = 100mA --VDD = 2.0V to 5.8V VDD = 2.0V to 5.8V C1 = C2 = 0 to 0.1V C1 = C2 = 0.1 to 0.3V VDD = 2.0V to 5.8V VIN = 3.0V. See Figure 1. VIN = 3.0V. See Figure 1. --VDD = 2.0V to 5.8V VDD = 2.0V to 5.8V ----- 215 27.5 85 0 1.5 244 31.2 - 273 34.9 89 -0.6 0.6 0.3 VDD Thermal Resistance (Mounted on FR4 board, 25mm x 25mm x 1.57mm) Package MSOP-10 DFN/MLP-10 JA 400 oC/W 60 oC/W 3 NR033106 Functional Block Diagram VDD Lx HV841 C1 C2 R SW-OSC CS Control Logic & Switch-Osc VSENSE Output Drivers Vcs EL1 + Vcs GND Disable Logic Control & Divide by 128 Figure 1: Test Circuit VEN = ON VEN = ON 0 = OFF 0 = OFF EL Lamp 1 (1.9 in2)3 1 2 C1 VDD + VDD - 470 k 0.1F 3 4 5 RSW-OSC Com C2 GND CS LX VIN + HV841MG-G/ HV841K6-G 4.7F - 1 or any (equivalent or better) > 120V, fast recovery diode 2 Murata LQH4CN331K04 3 The bigger sized lamp should be tied to EL1 and the smaller sized lamp to EL2 terminals (pins 10 and 9 respectively) VREF EL1 EL2 10 9 8 7 6 EL2 COM EL Lamp 2 (1.6 in2)3 BAS211 ~ 330H2 3.3 nF, 200V 4 NR033106 HV841 Pin Configuration and Description Pin # 1 2 Name C1 VDD Function Enable input signal for EL lamp 1. Logic high will turn ON the EL lamp 1 and logic low will turn it OFF. Refer to the Function Table. Input supply voltage pin. External resistor connection to set both the switching MOSFET frequency and EL Lamp frequency. The external resistor should be connected between this pin and the VDD pin. The EL lamp frequency is switching frequency divided by 128. 3 RSW-OSC The switching frequency increases as the value of RSW-OSC decreases. A 470k resistor will provide a switching frequency of 31.2 kHz, and an EL lamp frequency of 244 Hz. To change the frequency to fSW1, the value of the resistor RSW-OSC1 can be determined as RSW-OSC1 = (470k x 31.2k) / fSW1. 4 5 C2 GND Enable input signal for EL lamp 2. Logic high will turn ON the EL lamp 2 and logic low will turn it OFF. Refer to the Function Table. IC Ground Pin. External inductor connection to boost the low input voltage using inductive flyback. Connect an inductor between VIN and this pin. Also connect a high voltage fast recovery diode between this pin and the CS pin. The anode of the diode needs to be connected to the LX pin and the cathode to the CS pin. In general, small valued inductors, which can handle more current, are more suitable for driving large sized lamps. As the inductor value decreases, the switching frequency should be increased to avoid saturation. When the switching MOSFET is turned ON, the inductor is being charged. When the MOSFET is turned OFF, the energy stored in the inductor is transferred to the high voltage capacitor connected at the CS pin. 6 LX 7 8 9 10 CS Com EL2 EL1 Connect a 200V capacitor between this pin and GND. This capacitor stores the energy transferred from the inductor. Common connection for both EL lamps. Connect one end of both the lamps to this pin. EL lamp 2 connection. For optimum performance, the smaller of the two lamps should be connected to this pin. EL lamp 1 connection. For optimum performance, the larger of the two lamps should be connected to this pin. 5 NR033106 HV841 Split Supply Configuration The HV841 can be used in applications operating from a battery where a regulated voltage is available. This is shown in Figure 2. The regulated voltage can be used to drive the internal logic of HV841. The amount of current used to drive the internal logic is less than 190A. Therefore, the regulated voltage could easily provide the current without being loaded down. Figure 2: Split Supply Configuration VEN = ON 0 = OFF VEN = ON 0 = OFF Regulated Voltage = VDD EL Lamp 11 1 2 C1 VDD EL1 EL2 10 9 8 7 6 RSW-OSC 3 4 5 RSW-OSC Com C2 GND CS LX EL Lamp 21 D Battery Voltage = VIN HV841MG-G/ HV841K6-G ~ LX CS 1 The bigger sized lamp should be tied to EL1 and the smaller sized lamp to EL2 terminals (pins 10 and 9 respectively) Audible Noise Reduction This section describes a method (patented) developed at Supertex to reduce the audible noise emitted by the EL lamps used in application sensitive to audible noise. The waveform takes the shape of approximately 2RC time constants for rising and 2RC time constants for falling, where C is the capacitance of the EL lamp, and R is the external resistor, RSER connected in series with the EL lamp. Figure 3 shows a general circuit schematic that uses the series resistors, RSER1 and RSER2, for each of the EL lamps. RSER1 and RSER2 are connected in series with the EL lamp. The audible noise can be set a desirable level by selecting the resistances for RSER1 and RSER2. It is important to note that addition of these external resistors will reduce the voltage across the EL lamp, and hence the brightness of the EL lamp. Figure 3: Typical Application Circuit For Audible Noise Reduction ON = VEN OFF = 0 ON = VEN OFF = 0 Enable 1 RSER1 Enable 2 1 2 EL Lamp 11 C1 VDD EL1 EL2 10 9 8 7 6 RSER2 EL Lamp 21 D + VDD CDD RSW-OSC 3 4 5 RSW-OSC Com C2 GND CS LX VIN + CIN - HV841MG-G/ HV841K6-G ~ LX CS 1 The bigger sized lamp should be tied to EL1 and the smaller sized lamp to EL2 terminals (pins 10 and 9 respectively) 6 NR033106 HV841 10-Lead DFN/MLP Package Outline (K6) 0.118 (3.000) 0.087 (2.200) 0.020 (0.500) 0.059 (1.500) 0.118 (3.000) 0.059 (1.500) 0.063 (1.600) Pin #1 Index Top View 0.0350.004 (0.9000.100) Bottom View Side View +0.001 -0.001 +0.030 0.020 -0.020 0.001 ) 0.008 (0.200) 10-Lead MSOP Package Outline (MG) 0.0200.006 (0.5000.152) GATE PLANE = 0.1930.004 (4.9000.100) 0.1180.004 (3.0000.100) 0- 6 0.0210.005 (0.5500.150) 0.010 (0.250) * Full Circle or Half Circle * 0.1180.004 (3.0000.100) DETAIL A 0.0370.005 (0.950.015) 0.0330.004 (0.8500.100) SEE DETAIL A Notes: 1. Measurement Legend = Dimensions in Inches (Dimensions in Millimeters) 0.0130.003 (0.3250.075) 0.0040.002 (0.1000.050) 2. MLP Package dimensions conform to JEDEC MO-229 Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell its products for use in such applications, unless it receives an adequate "product liability indemnification insurance agreement". Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the Supertex website: http//www.supertex.com. (c)2006 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV841 NR033106 7 ) ) ) Pin #1 Index +0.006 -0.004 +0.150 0.300 -0.100 0.012 ) +0.002 -0.003 +0.050 0.250 -0.070 0.010 ) 0.0070.002 (0.1800.050) Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 222-8888 / FAX: (408) 222-4895 www.supertex.com |
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